CXD1922Q An Industry Breakthrough in MPEG-2 Technology MPEG-2 data compression is currently being used in DVD recording, digital broadcasting and being planned for a host of emerging applications such as storage media, communications and authoring applications. It enables large volumes of image data to be transmitted and received while meeting high quality standards of data associated with these applications. MPEG-2 uses complex algorithms coupled with motion estimation to enable the compression of moving images. These functions have typically been handled by multiple LSIs with high space and power requirements, making consumer applications difficult to develop and costly. Sony has developed extensive MPEG-2 capabilities aimed at advancing this core technology for consumer applications. As a result, it has designed the CXD1922Q, an MPEG-2 video encoder integrating motion estimation and encoding control on a single chip. In fact, timing control for the whole LSI and memory can be handled by internal processing. The significance of this breakthrough cannot be underestimated. The revolutionary CXD1922Q encoder LSI joins Sony's Virtuoso™ family of digital media devices and is the answer to many of the application limitations hindering consumer applications. Sony's new encoder LSI will enable expanding use of MPEG-2 video compression for cost sensitive applications that require this solution (Figure 1).   Figure 1. Consumer Applications for MPEG-2 Data Compression The Widest Search Range In A Single LSI Chip By using an advanced adaptive motion estimation algorithm developed by Sony for efficient video compression processing, the chip expands existing search ranges to -288 to +297.5 horizontal pixels and -96 to +95.5 vertical pixels. This doubles the vertical range and triples the horizontal range of any previous Sony product. This is also the widest range of any product currently available on the market (Figure 2).   Figure 2. Motion Estimation Along with enhanced capabilities, comes enhanced efficiency. In the past, to achieve the same search range, a staggering 108 Sony LSI chips would have been required. By using an adaptive motion algorithm optimized by Sony for the MPEG-2 standard, the CXD1922Q LSI allows for the high quality recording and transmission of fast moving images with minimal image degradation. It significantly reduces the vast amount of arithmetic operation required for applications of this type. This is especially useful in video applications where the video camera is moved rapidly to capture the fast-motion of sporting events or other volatile activity. Efficient Encoding Controller Incorporated Into CXD1922Q Compressing data using MPEG-2 technology requires large amounts of arithmetic operation and complex control. These operations were previously implemented through the use of multiple chips. Applications used large circuits and created high power consumption. The CXD1922Q LSI represents an industry first by integrating complex motion estimation control, bit rate control, timing control and the handling of memory management by internal processing. High Integration/Low Power Consumption The CXD1922Q LSI combines high integration technology with low power consumption. Previously between three and ten LSIs or several printed circuit boards were required to achieve similar results. Sony engineers, using a 0.4 micron CMOS process, developed a highly integrated architecture enabling 4.5 million transistors on a single chip. Further, a multi-clock system was created that generates clock signals according to the required operating speed for various blocks inside the chip using an on-chip PLL circuit. Clock signals are distributed to each block limiting total power dissipation to 1.2/W, which is about 1/10 that of alternative implementations (Table 1). Functions MPEG-2 MP@ML real-time video encoder NTSC: 720 x 480 at 30fps (M </= 3) PAL: 720 x 25fps (M </= 3) Search Range Horizontal: -288 to +287.5 pixels Vertical: -96 to +95.5 pixels Motion detection technique Adaptive motion detection algorithm External memory 32Mbits (16Mbits x 2) Semiconductor fabrication process 0.4µm three-layer metal CMOS process Supply voltage Single 3.3V power supply Clock frequency External clock input operation: 27MHz, 33MHz Internal operation: 67.5, 45, 27, 22.5, and 13.5MHz Power consumption 1.2W Number of transistors About 4.5 million Package 208-pin QFP Table 1. CXD1922Q Features Minimal External DRAM Requirements Using less external SDRAM memory (32Mbits) than other current products, the impressive CXD1922Q LSI encodes both NTSC and PAL video signals at up to M=3. The input block supports the 4:2:2 format of the ITU-R Rec. 656 standard and automatically converts input signals to the 4:2:0 format specified by the MPEG-2 main profile. Output signals are an MPEG-2 video elementary stream (Figure 3).   Figure 3. CXD1922Q Block Diagram Future Developments The CXD1922Q LSI enables high quality MPEG-2 video encoding and compression of moving images while significantly reducing power consumption and space requirements. As a result, this chip will play an impressive role in the development of consumer products and emerging applications. Sony is currently investigating the possibility of using the same single chip technology in audio encoders, system multiplexers and video/audio decoders. The result will be lower costs, higher integration, enhanced efficiency and better performance. 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